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    Join Date
    Aug 2011

    Download Punjab Technical University B. Tech Computer Science Engineering Third Semester Digital Circuits & Logic Design (CS-205) Exam Previous Years Question Papers

    The objective of Digital Circuits & Logic Design paper offered in the third semester of B. Tech Computer Science Engineering course is to offers students a fundamental understanding about digital hardware components at the level of sequential and gate circuits. It also aims at treating logic design and making them familiar with the CAD tools in digital system design. The paper code for this paper is CS-205.

    Mark distribution for CS-205 paper:

    Total marks for the paper is 100, which includes internal marks of 40 and external mark of 60. Syllabus for this paper along with the appropriate percentage of marks allotted for each of them is given below:

    Syllabus for CS-205 paper:

    • Data and number representation-binary-complement representation BCD-ASCII, ISCII. - [15%]
    • Boolean algebra, logic gates, minimization, use of programs such as expresso in minimization. [5%]
    • Digital Circuit Technologies, RTL/DTL/DCTL/TTL/MOS/CMOS/ECL, analysis of basic circuits in these families, internal architecture of programmable logic devices. [10%]
    • Combinational design, design with Muxes. [5%]
    • Sequential circuits, flip-flops, counters, shift registers, multivibrators, state diagrams, sequential circuit design from state diagrams computer aids in synthesis. [15%]
    • Memory system - RAM. ROM, EPROM, EEPROM, PAL, PLDs,PGAs. [20%]
    • Bus structures, transmission line effects, line termination. [10%]
    • A/D and D/A conversion techniques and selected case studies. [15%]
    • Introduction to VLSI Design, Custom and semi-custom design. [5%]

    Previous Years Question papers:

    Past question papers of B. Tech CSE Digital Circuits & Logic Design paper are given in the attachment.

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